5034 Avago Technologies (Malaysia) Sdn. Bhd.
5034 Avago Technologies (Malaysia) Sdn. Bhd.

ASIC Physical Design Engineer

TLDR

Involves full-flow physical design of 100–400M-gate ICs across 7nm–2nm nodes using major EDA tools, RTL to GDS with timing and verification.

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Job Description:

Skills and responsibilities:

Utilize commercial and in-house EDA tools (e.g. Synopsys, Cadence, Siemens) for the design and implementation of 100 ~ 400 million gate integrated circuits in 7nm/5nm/3nm/2nm process technologies.
Able to handle a full RTL to GDS or Gates to GDS flow, inclusive of all construction stages (e.g. Placement, clock tree synthesis, detailed routing, physical verification, formal verification and timing analysis).
Some knowledge of front end design and synthesis is advantageous
Proficiency in UNIX/Linux and scripting languages, e.g. tcl, bash


Required Qualifications:

Degree, Masters or PhD in Electrical/Electronics/Computer engineering.
Minimum of 5 years or more experience in a relevant field.

Broadcom is proud to be an equal opportunity employer.  We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law.  We will also consider qualified applicants with arrest and conviction records consistent with local law.

If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

Avago Technologies develops industry-leading software solutions that power mainframe systems, which are crucial to the digital economy and support a significant portion of structured corporate data and enterprise applications. By partnering with Fortune 1000 companies, we ensure that their operations remain efficient and reliable while continually enhancing our capabilities in semiconductor manufacturing.

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