Job Details:

Job Description:

• Define validation methodology and plans for post-silicon validation of timing models, FPGA core logic and routing fabric circuits. 
• Develop FPGA validation pattern sets.  Drive capability on various tester platforms to enable volume characterization.
• Holistically drive to achieve correlation between simulation models and actual performance on silicon to meet product quality goals.  This includes:
  • Collaboration with worldwide cross-functional teams: Engage with chip designers and software model engineers to define validation requirements and analyze silicon results.
  • Performing statistical analysis to deep dive into data trends.
  • Examining product architecture and silicon material composition.
• Participate in binning definition and strategy from product performance perspective.
• As part of a highly technical team, you will have the opportunity to innovate on and establish new validation methodology, as well as new volume characterization process improvements.

Qualifications:

• Candidate must possess at least a BS/MS in Electrical/Electronic Engineering or equivalent, with >8 years of      industry experience in semiconductors design or manufacturing.
• Strong statistical analysis and digital logic knowledge.
• Exposure to multiple ATE tester and bench platforms and proficiency in automation scripting are advantages.

Job Type:

Regular

Shift:

Shift 1 (Malaysia)

Primary Location:

Penang 15, Penang, Malaysia

Additional Locations:

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.